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S3C2501X
6.4.6.3 Data Transfer Format
Data transfers uses the format shown in Figure 6-5. After the start condition has been generated, a 7-bit slave
address is sent. The eighth bit is a data direction bit (R/W). A "0" direction bit indicates a transmission (Write)
and a "1" indicates a request for data (Read).
A data transfer is always terminated by a stop condition which is generated by the master. However, if a master
still wishes to communicate on the bus, it can generate another start condition and address another slaves
without first generating a stop condition. This feature supports the use of various combinations of read/write
formats for data transfers.
Multiple byte master receiver format:
S
Slave address
Multiple byte master transmitter format:
S
Slave address
NOTE:
S
W
R
P
A
NAK
2
6.4.6.4 I
C Addressing
The addressing procedure for the I
the master will select. Usually, this first byte immediately follows the start procedure.
An exception is the "general call" address which can address all ICs simultaneously. When this address is used,
all ICs should, in theory, respond with an acknowledge. However, ICs can also be made to ignore this address.
The second byte of the general call address then defines the action to be taken.
6.4.6.5 Definition of Bits in the First Data Byte
The first seven bits of the first data byte make up the slave address. The eighth bit is the LSB, or direction bit,
which determines the direction (R/W) of the message.
When an address is sent, each IC on the bus compares the first 7 bits received following start condition with its
own address. If the addresses match, the IC considers itself addressed by the master as a slave receiver or a
slave transmitter.
R
A
Data 1 (8 bits)
W
A
Data 1 (8 bits)
(Start)
(Write; bit value is 0)
(Read; bit value is 1)
(Stop),
(Acknowledge; The ACK is first sent from the slave. Afterwards, the direction
depends on the data transfer direction. In other words, if the mater reads the
data, it sends the ACK.)
(Not Acknowledge)
Figure 6-5. Data Transfer Format
2
C is such that the first byte after the start condition determines which slave
A
Data 2
A
Data M
A
Data 2
A
Data M
2
I
C CONTROLLER
N
P
A
K
A P
6-7
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