Accessing Hi-Registers In Thumb State; The Program Status Registers - Samsung S3C2501X User Manual

32-bit risc microprocessor
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PROGRAMMER'S MODEL

2.7.4 ACCESSING HI-REGISTERS IN THUMB STATE

In THUMB state, registers R8–R15 (the Hi registers) are not part of the standard register set. However, the
assembly language programmer has limited access to them, and can use them for fast temporary storage.
A value may be transferred from a register in the range R0–R7 (a Lo register) to a Hi register, and from a Hi
register to a Lo register, using special variants of the MOV instruction. Hi register values can also be compared
against or added to Lo register values with the CMP and ADD instructions. For more information, refer to Figure
3-34.

2.8 THE PROGRAM STATUS REGISTERS

The ARM9TDMI contains a Current Program Status Register (CPSR), plus five Saved Program Status Registers
(SPSRs) for use by exception handlers. These register's functions are:
— Hold information about the most recently performed ALU operation
— Control the enabling and disabling of interrupts
— Set the processor operating mode
The arrangement of bits is shown in Figure 2-6.
Condition Code Flags
31
30
29
28
N
Z
C
V
2-8
(Reserved)
27
26
25
24
.
.
.
.
.
Overflow
Carry/Borrow/Extend
Zero
Negative/Less Than
Figure 2-6. Program Status Register Format
8
7
6
5
.
I
F
T
Control Bits
4
3
2
1
M4
M3
M2
M1
Mode bits
State bit
FIQ disable
FRQ disable
S3C2501X
0
M0

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