Format 18: Unconditional Branch; Operation - Samsung S3C2501X User Manual

32-bit risc microprocessor
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INSTRUCTION SET

3.37 FORMAT 18: UNCONDITIONAL BRANCH

15
14
13
1
1
1

3.37.1 OPERATION

This instruction performs a PC-relative Branch. The THUMB assembler syntax is shown below. The branch offset
must take account of the prefetch operation, which causes the PC to be 1 word (4 bytes) ahead of the current
instruction.
THUMB Assembler
B label
NOTE: The address specified by label is a full 12-bit two's complement address,
but must always be half-word aligned (ie bit 0 set to 0), since the assembler places label >> 1 in the Offset11 field.
Examples
here
B here
B jimmy
...
Jimmy
...
3-94
11
10
12
0
0
[10:0] Immediate Value
Figure 3-47. Format 18
Table 3-25. Summary of Branch Instruction
ARM Equivalent
BAL label (half-word offset) Branch PC relative +/- Offset11 << 1, where label is PC
Offset11
+/- 2048 bytes.
; Branch onto itself. Assembles to 0xE7FE.
; (Note effect of PC offset).
; Branch to 'jimmy'.
; Note that the THUMB opcode will contain the number of
; half-words to offset.
; Must be half-word aligned.
S3C2501X
0
Action

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