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SERIAL I/O (HIGH-SPEED UART)
Table 11-3. High-Speed UART Control Register Description (Continued)
Bit Number
[25]
Request to Send to pin
(RTS)
[27:26]
Reserved
[28]
Hardware Flow Control
Enable (HFEN)
[29]
Software Flow Control
Enable (SFEN)
[30]
Echo Mode
(ECHO)
[31]
RTS/RTR selection
(RTS/RTR)
11-6
Bit Name
This bit directly controls the High-Speed UART pin only when the
High-Speed UART is not hardware flow control mode. If this bit set
to one, High-Speed UART pin goes Low level. Otherwise, it remains
High level.
This bit should be cleared by zero.
This bit determines whether High-Speed UART select hardware flow
control or not. If this bit set to one, High-Speed UART will control all
pins concerning to hardware flow control.
This bit determines whether High-Speed UART select software flow
control or not. If this bit set to one, High-Speed UART will act in
software flow control.
In this mode, you have to use Control Character register.
If this bit is set to one, RX data is sent not only HURXBUF but also
TX port directly, so HUTXBUF data will not be transmitted.
This selection bit determines output of HUnRTS0/HUnRTS1 pin
0 = RTS
1 = RTR
NOTE: In RxFIFO mode, RTR goes to '1' when RxFIFO is full,
Description
In NonRxFIFO mode, RTR goes to '1' when RxBUF is not empty.
S3C2501X
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