Samsung S3C2501X User Manual page 21

Table
Number
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23
5-24
5-25
5-26
5-27
5-28
6-1
6-2
6-3
6-4
6-5
6-6
S3C2501X
List of Tables
Base Address of Each Bank ...................................................................................5-3
Bus Interface Signals..............................................................................................5-5
External 32-bit Datawidth Store Operation with Big-Endian.....................................5-7
External 32-bit Datawidth Load Operation with Big-Endian .....................................5-7
External 16-bit Datawidth Store Operation with Big-Endian.....................................5-8
External 16-bit Datawidth Load Operation with Big-Endian .....................................5-8
External 8-bit Datawidth Store Operation with Big-Endian ......................................5-9
External 8-bit Datawidth Load Operation with Big-Endian .......................................5-9
External 32-bit Datawidth Store Operation with Little-Endian ..................................5-10
External 32-bit Datawidth Load Operation with Little-Endian...................................5-10
External 16-bit Datawidth Store Operation with Little-Endian ..................................5-11
External 16-bit Datawidth Load Operation with Little-Endian...................................5-11
External 8-bit Datawidth Store Operation with Little-Endian ....................................5-12
External 8-bit Datawidth Load Operation with Little-Endian.....................................5-12
Ext. I/O Bank Controller Special Registers .............................................................5-21
Bank n Control (BnCON) Register ..........................................................................5-23
Muxed Bus Control Register ...................................................................................5-25
WAIT Control Register ...........................................................................................5-27
Supported SDRAM Configuration of 32-bit External Bus.........................................5-40
Supported SDRAM Configuration of 16-bit External Bus.........................................5-41
SDRAM Address Mapping of 32-bit External Bus ...................................................5-42
SDRAM address mapping of 16-bit external bus.....................................................5-43
SDRAM commands................................................................................................5-44
SDRAM Special Registers......................................................................................5-47
SDRAM Configuration Register ..............................................................................5-47
SDRAM Command Register...................................................................................5-50
SDRAM Refresh Timer Register.............................................................................5-52
SDRAM Write Buffer Time-out Register .................................................................5-53
Control Status Register...........................................................................................6-8
IICCON Register Description ..................................................................................6-8
IICBUF Register .....................................................................................................6-10
IICPS Register .......................................................................................................6-10
IICCNT Register .....................................................................................................6-11
IICPND Register.....................................................................................................6-11
(Continued)
Title Page
Number
xxi