Samsung S3C2501X User Manual page 17

Figure
Number
11-11
11-12
11-13
11-14
11-15
11-16
11-17
11-18
11-19
11-20
11-21
11-22
11-23
11-24
12-1
12-2
12-3
12-4
12-5
12-6
13-1
13-2
13-3
13-4
13-5
14-1
14-2
14-3
14-4
14-5
14-6
14-7
16-1
S3C2501X
List of Figures
AutoBaud Boundary Register Range ......................................................................11-22
High-Speed UART AutoBaud Boundary Register....................................................11-22
Example of AutoBaud Table Register Setting .........................................................11-23
High-Speed UART AutoBaud Table Register..........................................................11-23
When CTS Signal Level is High During Transmit Operation ...................................11-25
When CTS Signal Level is Low During Transmit Operation ....................................11-25
Normal Received Rx Data......................................................................................11-26
DCD Lost During Rx Data Receive.........................................................................11-26
Interrupt-Based Serial I/O Transmit and Receive Timing Diagram..........................11-27
DMA-Based Serial I/O Timing Diagram (Tx Only)...................................................11-28
DMA-Based Serial I/O Timing Diagram (Rx Only) ..................................................11-28
Serial I/O Frame Timing Diagram (Normal High-Speed UART) ..............................11-29
Infra-Red Transmit Mode Frame Timing Diagram...................................................11-29
Infra-Red Receive Mode Frame Timing Diagram ...................................................11-30
I/O Port Mode Registers 1/2 ...................................................................................12-3
I/O Function Control Register 1 ..............................................................................12-5
I/O Function Control Register 2 ..............................................................................12-6
I/O Port Control Register for GDMA........................................................................12-7
I/O Port Control Register for External Interrupt .......................................................12-9
I/O Port External Interrupt Clear Register ...............................................................12-10
Internal Interrupt Mode Register .............................................................................13-4
External Interrupt Mode Register ............................................................................13-5
Internal Interrupt Mask Register..............................................................................13-6
External Interrupt Mask Register ............................................................................13-7
Interrupt Priority Register........................................................................................13-8
Timer Output Signal Timing....................................................................................14-2
32-Bit Timer Block Diagram ...................................................................................14-3
Timer Mode Register..............................................................................................14-5
Timer Data Registers..............................................................................................14-6
Timer Count Registers............................................................................................14-7
Timer Interrupt Clear Register ................................................................................14-8
Watchdog Timer Register.......................................................................................14-9
272-BGA-2727-AN Package Dimensions................................................................16-2
(Concluded)
Title Page
Number
xvii