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S3C2501X
Examples
STR
STR
LDR
LDR
LDREQB
STR
PLACE
R1,[R2,R4]!
R1,[R2],R4
R1,[R2,#16]
R1,[R2,R3,LSL#2]
R1,[R6,#5]
R1,PLACE
; Store R1 at R2 + R4 (both of which are registers)
; and write back address to R2.
; Store R1 at R2 and write back R2 + R4 to R2.
; Load R1 from contents of R2 + 16, but don't write back.
; Load R1 from contents of R2 + R3 * 4.
; Conditionally load byte at R6 + 5 into
; R1 bits 0 to 7, filling bits 8 to 31 with zeros.
; Generate PC relative offset to address PLACE.
INSTRUCTION SET
3-33
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