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S3C2501X
2.16.1.5 Register 3: Write buffer control register
This register contains a write buffer control (bufferable) attribute bit for each of the eight areas of memory. Each
bit is used in conjunction with the cacheable bit to control write-buffer operation.
Setting a bit makes an area bufferable, clearing a bit makes an area unbuffered. For example:
MCR p15,0,Rd,c3,c0,0; Write data-bufferable bits
MRC p15,0,Rd,c3,c0,0; Read data-bufferable bits
The opcode_2 field should be 0 because the write buffer only operates on data regions. The following
table, therefore, only applies to the DCache.
All defined bits in the write buffer control register are set to zero at reset.
Register Bits
7
6
5
4
3
2
1
0
2.16.1.6 Register 5: Instruction and data space protection registers
These registers contain the access permission bits for the instruction and data protection regions. The opcode_2
field determines whether the instruction or data access permissions are programmed.
If the opcode_2 field = 0, the data space bits are programmed. For example:
MCR p15,0,Rd,c5,c0,0; Write data space access permissions
MCR p15,0,Rd,c5,c0,0; Read data space access permissions
If the opcode_2 field =1, the instruction space bits are programmed. For example:
MCR p15,0,Rd,c5,c0,1; Write instruction space access permissions
MRC p15,0,Rd,c5,c0,1; Read instruction space access permissions
NOTE
Table 2-11. Write Buffer Control Register
Write buffer control bit (B_d7) for data area 7
Write buffer control bit (B_d6) for data area 6
Write buffer control bit (B_d5) for data area 5
Write buffer control bit (B_d4) for data area 4
Write buffer control bit (B_d3) for data area 3
Write buffer control bit (B_d2) for data area 2
Write buffer control bit (B_d1) for data area 1
Write buffer control bit (B_d0) for data area 0
Functions
PROGRAMMER' ' S MODEL
2-25
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