Samsung S3C2501X User Manual page 94

32-bit risc microprocessor
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S3C2501X
Mnemonic
ORR
OR
RSB
Reverse subtract
RSC
Reverse subtract with carry
SBC
Subtract with carry
STC
Store coprocessor register to memory
STM
Store multiple
STR
Store register to memory
SUB
Subtract
SWI
Software Interrupt
SWP
Swap register with memory
TEQ
Test bit-wise equality
TST
Test bits
Table 3-1. The ARM Instruction Set (Continued)
Instruction
INSTRUCTION SET
Action
Rd: = Rn OR Op2
Rd: = Op2 - Rn
Rd: = Op2 - Rn-1 + Carry
Rd: = Rn - Op2-1 + Carry
Address: = CRn
Stack manipulation (push)
<address>: = Rd
Rd: = Rn - Op2
OS call
Rd: = [Rn], [Rn] := Rm
CPSR flags: = Rn EOR Op2
CPSR flags: = Rn AND Op2
3-3

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