MEMORY CONTROLLER
5.7 SDRAM CONTROLLER
5.7.1 FEATURES
The SDRAM controller provides the following features:
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Provides merging write buffer to improve system performance.
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Supports for 16M-bit, 64M-bit, 128M-bit and 256M-bit SDRAM devices with two or four leaves.
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Allows a direct interface to up to two banks of SDRAM.
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Each bank supports 16 or 32 bits wide and up to 128M-byte in size.
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Support byte, half-word and word transaction.
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CAS latency can be 1, 2 or 3
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Provides auto refresh and self refresh mode to sustain the contents of SDRAM memory.
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S3C2501X