Uart Baud Rate Divisor Register - Samsung S3C2501X User Manual

S3C2501X

10.3.6 UART BAUD RATE DIVISOR REGISTER

The values stored in the baud rate divisor registers, CUBRD, let you determine the serial TX/RX clock rate (baud
rate) as follows:
Register Address
CUBRD 0xF0060014
31 30 29 28 27
BRGOUT =
Table 10-12. CUBRD Registers
R/W
R/W Console UART baud rate divisor register
26 25 24 23 22 21 20 19
[3:0] Baud rate divisor value CNT1
xxx0 = Divide by 1
xxx1 = Divide by 16
[15:4] Time constant value for CNT0
Figure 10-8. Console UART Baud Rate Divisor Register
PCLK2 or EXT_UCLK
(CNT0+1) × 16 × 16
CNT1
Description
18 17 16 15
SERIAL I/O (CONSOLE UART)
Size
H
4 3
CNT0
Reset Value
0x0000
0
CNT1
10-15