Samsung S3C2501X User Manual page 318

S3C2501X
7.4.2.6 MAC Receive Control Register
Registers
MACRXCONA 0xF00B0010
MACRXCONB 0xF00D0010
Bit Number
[0] Receive enable (MRxEn)
[1] Receive halt request
(MRxHalt)
[2] Long enable (MLongEn)
[3] Short enable (MShortEn)
[4] Strip CRC value (MStripCRC)
[5] Pass control frame
(MPassCtl)
[6] Ignore CRC value
(MIgnoreCRC)
[31:7] Reserved
Table 7-20. MACRXCON Register
Offset R/W
R/W
R/W
Bit Name
Description
Receive control
Receive control
Set this bit to '1' to enable MAC receive operation.
If '0', stop reception immediately.
Set this bit to halt reception after completing the reception of
any current frame.
Set this bit to receive frames with lengths greater than 1518
bytes.
Set this bit to receive frames with lengths less than 64 bytes.
Set this bit to check the CRC, and then strip it from the
message.
Set this bit to enable the passing of control frames to a MAC
client.
Set this bit to disable CRC value checking.
Not applicable.
ETHERNET CONTROLLER
Description
Reset Value
0x00000000
0x00000000
7-29