Texas Instruments TMS320C6474 Manual page 114

Multicore digital signal processor
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TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
7.7.6 Reset Controller Register
The reset type status (RSTYPE) register (029A 00E4) is the only register for the reset controller. This
register falls in the same memory range as the PLL1 controller registers [029A 0000 - 029A 01FF] (see
Table
7-19).
7.7.6.1
Reset Type Status Register Description
The reset type status (RSTYPE) register latches the cause of the last reset. If multiple reset sources occur
simultaneously, this register latches the highest priority reset source. The reset type status register is
shown in
Figure 7-6
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 7-6. Reset Type Status Register (RSTYPE) [Hex Address: 029A 00E4]
Table 7-19. Reset Type Status Register (RSTYPE) Field Descriptions
BIT
FIELD
VALUE
31:4
Reserved
3
SRST
1
WRST
2
Reserved
0
POR
114
Peripheral Information and Electrical Specifications
and described in
Table
7-19.
Reserved
R-0
Reserved. The reserved bit location is always read as 0. A value written to this field has not effect.
System Reset.
0
System Reset was not the last reset to occur.
1
System Reset was the last reset to occur.
Warm Reset.
0
Warm Reset was not the last reset to occur.
1
Warm Reset was the last reset to occur.
Reserved. The reserved bit location is always read as 0. A value written to this field has not effect.
Power-on Reset.
0
Power-on Reset was not the last reset to occur.
1
Power-on Reset was the last reset to occur.
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Product Folder Link(s)
Reserved
R-0
DESCRIPTION
Copyright © 2008–2010, Texas Instruments Incorporated
:TMS320C6474
www.ti.com
4
3
2
1
SRST
Rsvd
WRST
R-0
R-0
R-0
16
0
POR
R-0

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