Texas Instruments TMS320C6474 Manual page 24

Multicore digital signal processor
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TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
CLKX1
FSX1
DX1
CLKR1
FSR1
DR1
CLKS1
FRAMEBURSTN
FRAMEBURSTP
ALTFSYNCPULSE
TRT
AIFTXN[5:0]
AIFTXP[5:0]
AIFRXN[5:0]
AIFRXP[5:0]
24
Device Overview
McBSP1
Transmit
Receive
Clock
Multichannel Buffered Serial Ports
FSYNC
Frame Synchroniztion (FSYNC)
Transmit
Receive
Antenna Interface (AIF)
Figure 2-9. McBSP/FSYNC/AIF/I2C Peripheral Signals
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Product Folder Link(s)
McBSP0
Transmit
Receive
Clock
(McBSPs)
Clock
I2C
Copyright © 2008–2010, Texas Instruments Incorporated
:TMS320C6474
www.ti.com
CLKX0
FSX0
DX0
CLKR0
FSR0
DR0
CLKS0
FSYNCCLKN
FSYNCCLKP
ALTFSYNCCLK
TRTCLK
SMFRAMECLK
SCL
SCL
SDA

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