Texas Instruments TMS320C6474 Manual page 195

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Table 7-89. Antenna Interface System Registers (continued)
HEX ADDRESS
02BD E000
02BD E004 - 02BD E7FC
02BD E800
02BD E804 - 02BE 3000
02BE 3004
02BE 3008
02BE 300C
02BE 3010
02BE 3014
02BE 3018
02BE 301C
02BE 3020
02BE 3024
02BE 3028
02BE 302C - 02BE 303C
02BE 3040
02BE 3044
02BE 3048
02BE 304C
02BE 3050
02BE 3054
02BE 3058
02BE 305C
02BE 3060
02BE 3064
02BE 3068
02BE 306C - 02BE 307C
02BE 3080
02BE 3084
02BE 3088
02BE 308C
02BE 3090
02BE 3094
02BE 3098
02BE 309C
02BE 30A0
02BE 30A4
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ACRONYM
CO_LINK4_CFG
-
CO_LINK5_CFG
-
DB_GENERIC_CFG
DB_DMA_QUE_CLR_CFG
DB_DMA_CNT_CLR_CFG
DB_OUT_PKTSW_EN_CFG
DB_OUT_PKTSW_FLUSH_CFG
DB_IN_FIFO_EVNT_CFG
DB_IN_FIFO_SIZE_CFG
DB_FORCE_SYSEVENT_CFG
DB_OUTB_TRK_AUTOSYNC_CFG
DB_INB_TRK_AUTOSYNC_CFG
-
DB_IN_DMA_CNT0_STS
DB_IN_DMA_CNT1_STS
DB_IN_DMA_CNT2_STS
DB_OUT_DMA_CNT0_STS
DB_OUT_DMA_CNT1_STS
DB_OUT_DMA_CNT2_STS
DB_IN_DMA_DEPTH_STS
DB_OUT_DMA_DEPTH_STS
DB_OUT_PKTSW_STS
DB_OUT_PKTSW_DEPTH_STS
DB_OUT_PKTSW_NE_STS
-
DB_OUT_PKTSW_HEAD0_STS
DB_OUT_PKTSW_HEAD1_STS
DB_OUT_PKTSW_HEAD2_STS
DB_OUT_PKTSW_HEAD3_STS
DB_OUT_PKTSW_HEAD4_STS
DB_OUT_PKTSW_HEAD5_STS
DB_OUT_PKTSW_HEAD6_STS
DB_OUT_PKTSW_HEAD7_STS
DB_OUT_PKTSW_HEAD8_STS
DB_OUT_PKTSW_HEAD9_STS
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SPRS552F – OCTOBER 2008 – REVISED JULY 2010
REGISTER NAME
CO Link 4 Configuration Register
Reserved
CO Link 5 Configuration Register
Reserved
Data Buffer Configuration Register
Data Buffer DMA Depth Clear Register
Data Buffer DMA Count Clear Register
Data Buffer Outbound Packet Switched FIFO Enable
Register
Data Buffer Inbound Packet Switched FIFO Flush Register
Data Buffer Inbound Packet Switched FIFO Flush Register
Data Buffer Inbound Packet Switched FIFO Depth
Register
Data Buffer Force System Events Register
Data Buffer PE Tracker Auto Sync Control Register
Data Buffer PD Tracker Auto Sync Control Register
Reserved
Data Buffer Inbound DMA Count 0 Register
Data Buffer Inbound DMA Count 1 Register
Data Buffer Inbound DMA Count 2 Register
Data Buffer Outbound DMA Count 0 Register
Data Buffer Outbound DMA Count 1 Register
Data Buffer Outbound DMA Count 2 Register
Data Buffer Inbound DMA Burst Available Register
Data Buffer Outbound DMA Burst Available Register
Data Buffer Outbound Packet Switched FIFO Status
Register
Data Buffer Outbound Packet Switched FIFO Depth
Register
Data Buffer Outbound Packet Switched FIFO Not Empty
Register
Reserved
Data Buffer Outbound Packet Switched FIFO0 Head
Pointer
Data Buffer Outbound Packet Switched FIFO1 Head
Pointer
Data Buffer Outbound Packet Switched FIFO2 Head
Pointer
Data Buffer Outbound Packet Switched FIFO3 Head
Pointer
Data Buffer Outbound Packet Switched FIFO4 Head
Pointer
Data Buffer Outbound Packet Switched FIFO5 Head
Pointer
Data Buffer Outbound Packet Switched FIFO6 Head
Pointer
Data Buffer Outbound Packet Switched FIFO7 Head
Pointer
Data Buffer Outbound Packet Switched FIFO8 Head
Pointer
Data Buffer Outbound Packet Switched FIFO9 Head
Pointer
Peripheral Information and Electrical Specifications
:TMS320C6474
TMS320C6474
195