Texas Instruments TMS320C6474 Manual page 106

TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
EVENT CHANNEL
72 RIOINT (2n+1)
73
74
75
76 IPC_LOCAL
77
78
79
80 CICn_EVT0
81 CICn_EVT1
82 CICn_EVT2
83 CICn_EVT3
84 CICn_EVT4
85 CICn_EVT5
86 CICn_EVT6
87 CICn_EVT7
88 CICn_EVT8
89 CICn_EVT9
90 CICn_EVT10
91 CICn_EVT11
92 CICn_EVT12
93 CICn_EVT13
94
95
96
97 EMC_IDMAERR
98
99
100
101
102-112
113
114-115
116
117
118
119 SYS_CMPA
120 PMC_CMPA
121 PMC_DMPA
122 DMC_CMPA
123 DMC_DMPA
124 UMC_CMPA
125 UMC_DMPA
(5) RIOINT interrupts are received by the C64x+ Megamodules, as follows:
• C64x+ Megamodule Core 0 receives RIOINT[1:0]
• C64x+ Megamodule Core 1 receives RIOINT[3:2]
• C64x+ Megamodule Core 2 receives RIOINT[5:4]
(6) For more information on CICn events, see the TMS320C6474 DSP Chip Interrupt Controller (CIC) User's Guide (literature number
SPRUFK6).
106 Peripheral Information and Electrical Specifications
Table 7-13. Interrupts (continued)
EVENT
(5)
RapidIO Interrupt (2n+1)
AIF_EVT0 Error/Alarm Event 0
AIF_EVT1 Error/Alarm Event 1
Unused Reserved
Inter DSP Interrupt from IPCGRn
Unused Reserved
Unused Reserved
Unused Reserved
System Event 0 (Combined) from Chip Interrupt Controller[n]
System Event 1 (Combined) from Chip Interrupt Controller[n]
System Event 2 from Chip Interrupt Controller[n]
System Event 3 from Chip Interrupt Controller[n]
System Event 4 from Chip Interrupt Controller[n]
System Event 5 from Chip Interrupt Controller[n]
System Event 6 from Chip Interrupt Controller[n]
System Event 7 from Chip Interrupt Controller[n]
System Event 8 from Chip Interrupt Controller[n]
System Event 9 from Chip Interrupt Controller[n]
System Event 10 from Chip Interrupt Controller[n]
System Event 11 from Chip Interrupt Controller[n]
System Event 12 from Chip Interrupt Controller[n]
System Event 13 from Chip Interrupt Controller[n]
Unused Reserved
Unused Reserved
INTERR Dropped CPU Interrupt Event
Invalid IDMA Parameters
Unused Reserved
Unused Reserved
EFINTA EFI Interrupt from Side A
EFIINTB EFI Interrupt from Side B
Unused Reserved
PMC_ED Single Bit Error Detected during DMA Read
Unused Reserved
UMC_ED1 Corrected Bit Error Detected
UMC_ED2 Uncorrected Bit Error Detected
PDC_INT PDC Sleep Interrupt
CPU Memory Protection Fault
CPU Memory Protection Fault
DMA Memory Protection Fault
CPU Memory Protection Fault
DMA Memory Protection Fault
CPU Memory Protection Fault
DMA Memory Protection Fault
Submit Documentation Feedback
Product Folder Link(s)
EVENT DESCRIPTION
Copyright © 2008–2010, Texas Instruments Incorporated
:TMS320C6474
www.ti.com
(6)