Texas Instruments TMS320C6474 Manual page 11

Multicore digital signal processor
Hide thumbs Also See for TMS320C6474:
Table of Contents

Advertisement

www.ti.com
Data path A
Data path B
A.
On .M unit, dst2 is 32 MB.
B.
On .M unit, dst1 is 32 LSB.
C.
On 64x+ CPU .M unit, src2 is 32 bits; on C64x+ CPU .M unit, src2 is 64 bits.
D.
On .L and .S units, odd dst connects to odd register files and even dst connects to even register files.
Copyright © 2008–2010, Texas Instruments Incorporated
32 MSB
ST1b
32 LSB
ST1a
32 MSB
LD1b
32 LSB
LD1a
DA1
DA2
32 LSB
LD2a
32 MSB
LD2b
32 MSB
ST2a
32 LSB
ST2b
Figure 2-1. TMS320C64x+TM CPU (DSP Core) Data Path
Submit Documentation Feedback
Product Folder Link(s)
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
src1
Odd
register
.L1
fileA
(A1, A3,
src2
A5...A31)
odd dst
(D )
even dst
8
long src
8
long src
even dst
(D )
odd dst
src1
.S1
src2
32
(A)
dst2
32
(B)
dst1
.M1
src1
src2
(C )
dst
.D1
src1
src2
2x
1x
Odd
src2
register
.D2
src1
file B
dst
(B1, B3,
B5...B31)
src2
(C )
.M2
src1
32
dst2
(B)
32
(A)
dst1
src2
.S2
src1
odd dst
(D )
even dst
8
long src
8
long src
even dst
(D )
odd dst
src2
.L2
src1
Control Register
:TMS320C6474
TMS320C6474
Even
register
file A
(A0, A2,
A4...A30)
Even
register
file B
(B0, B2,
B4...B30)
Device Overview
11

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TMS320C6474 and is the answer not in the manual?

Questions and answers

Table of Contents