TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
HEX ADDRESS
02D0 0304
02D0 0308
02D0 030C
02D0 0310
02D0 0314
02D0 0318
02D0 031C
02D0 0320
02D0 0324
02D0 0328
02D0 032C
02D0 0330
02D0 0334
02D0 0338
02D0 033C
02D0 0340 - 02D0 03FC
02D0 0400
02D0 0404
02D0 0408
02D0 040C
02D0 0410
02D0 0414
02D0 0418
02D0 041C
02D0 0420
02D0 0424
02D0 0428
02D0 042C
02D0 0430
02D0 0434
02D0 0438
02D0 043C
02D0 0440
02D0 0444
02D0 0448
02D0 044C
02D0 0450
02D0 0454
02D0 0458
02D0 045C
02D0 0460
02D0 0464
02D0 0468
02D0 046C
02D0 0470
174
Peripheral Information and Electrical Specifications
Table 7-79. RapidIO Control Registers (continued)
ACRONYM
INTDST1_DECODE
INTDST2_DECODE
RIO_INTDST3_Decode
RIO_INTDST4_Decode
RIO_INTDST5_Decode
RIO_INTDST6_Decode
RIO_INTDST7_Decode
RIO_INTDST0_Rate_CNTL
RIO_INTDST1_Rate_CNTL
RIO_INTDST2_Rate_CNTL
RIO_INTDST3_Rate_CNTL
RIO_INTDST4_Rate_CNTL
RIO_INTDST5_Rate_CNTL
RIO_INTDST6_Rate_CNTL
RIO_INTDST7_Rate_CNTL
-
RIO_LSU1_Reg0
RIO_LSU1_Reg1
RIO_LSU1_Reg2
RIO_LSU1_Reg3
RIO_LSU1_Reg4
RIO_LSU1_Reg5
RIO_LSU1_Reg6
RIO_LSU1_FLOW_MASKS
RIO_LSU2_Reg0
RIO_LSU2_Reg1
RIO_LSU2_Reg2
RIO_LSU2_Reg3
RIO_LSU2_Reg4
RIO_LSU2_Reg5
RIO_LSU2_Reg6
RIO_LSU2_FLOW_MASKS
RIO_LSU3_Reg0
RIO_LSU3_Reg1
RIO_LSU3_Reg2
RIO_LSU3_Reg3
RIO_LSU3_Reg4
RIO_LSU3_Reg5
RIO_LSU3_Reg6
RIO_LSU3_FLOW_MASKS
RIO_LSU4_Reg0
RIO_LSU4_Reg1
RIO_LSU4_Reg2
RIO_LSU4_Reg3
RIO_LSU4_Reg4
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Product Folder Link(s)
REGISTER NAME
INTDST Interrupt Status Decode Register 1
INTDST Interrupt Status Decode Register 2
RapidIO INTDST3 Interrupt Status Decode Register
RapidIO INTDST4 Interrupt Status Decode Register
RapidIO INTDST5 Interrupt Status Decode Register
RapidIO INTDST6 Interrupt Status Decode Register
RapidIO INTDST7 Interrupt Status Decode Register
RapidIO INTDST0 Interrupt Rate Control Register
RapidIO INTDST1 Interrupt Rate Control Register
RapidIO INTDST2 Interrupt Rate Control Register
RapidIO INTDST3 Interrupt Rate Control Register
RapidIO INTDST4 Interrupt Rate Control Register
RapidIO INTDST5 Interrupt Rate Control Register
RapidIO INTDST6 Interrupt Rate Control Register
RapidIO INTDST7 Interrupt Rate Control Register
Reserved
RapidIO LSU1 Control Reg0 Register
RapidIO LSU1 Control Reg1 Register
RapidIO LSU1 Control Reg2 Register
RapidIO LSU1 Control Reg3 Register
RapidIO LSU1 Control Reg4 Register
RapidIO LSU1 Control Reg5 Register
RapidIO LSU1 Control Reg6 Register
RapidIO Core0 LSU Congestion Control Flow Mask
Register
RapidIO LSU2 Control Reg0 Register
RapidIO LSU2 Control Reg1 Register
RapidIO LSU2 Control Reg2 Register
RapidIO LSU2 Control Reg3 Register
RapidIO LSU2 Control Reg4 Register
RapidIO LSU2 Control Reg5 Register
RapidIO LSU2 Control Reg6 Register
RapidIO Core1 LSU Congestion Control Flow Mask
Register
RapidIO LSU3 Control Reg0 Register
RapidIO LSU3 Control Reg1 Register
RapidIO LSU3 Control Reg2 Register
RapidIO LSU3 Control Reg3 Register
RapidIO LSU3 Control Reg4 Register
RapidIO LSU3 Control Reg5 Register
RapidIO LSU3 Control Reg6 Register
RapidIO Core2 LSU Congestion Control Flow Mask
Register
RapidIO LSU4 Control Reg0 Register
RapidIO LSU4 Control Reg1 Register
RapidIO LSU4 Control Reg2 Register
RapidIO LSU4 Control Reg3 Register
RapidIO LSU4 Control Reg4 Register
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:TMS320C6474
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