Texas Instruments TMS320C6474 Manual page 144

TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
Table 7-46. Timing Requirements for FSR When GSYNC = 1
(see Figure 7-29)
NO.
1 t Setup time, FSR high before CLKS high
su(FRH-CKSH)
2 t Hold time, FSR high after CLKS high
h(CKSH-FRH)
FSR External
CLKR/X
(No Need to Resync)
CLKR/X
(Needs to Resync)
144 Peripheral Information and Electrical Specifications
Figure 7-28. McBSP Timing
CLKS
Figure 7-29. FSR Timing When GSYNC = 1
Submit Documentation Feedback
Product Folder Link(s)
1
2
Copyright © 2008–2010, Texas Instruments Incorporated
:TMS320C6474
www.ti.com
MIN MAX UNIT
4 ns
4 ns