Texas Instruments TMS320C6474 Manual page 168

Multicore digital signal processor
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TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
7.16.2 VCP2 Peripheral Register Description(s)
EDMA BUS HEX ADDRESS RANGE
5800 0000
5800 0004
5800 0008
5800 000C
5800 0010
5800 0014
5800 0018 - 5800 0044
5800 0048
5800 004C
5800 0050 - 5800 007C
5800 0080
5800 0084 - 5800 009C
5800 00C0
N/A
N/A
N/A
N/A
N/A
-
N/A
N/A
5800 1000
5800 2000
5800 3000
5800 6000
5800 F000
168
Peripheral Information and Electrical Specifications
Table 7-77. VCP2 Registers
CONFIGURATION BUS HEX
ADDRESS RANGE
-
-
-
-
-
-
-
-
-
-
N/A
-
N/A
02B8 0018
02B8 0020
02B8 0040
02B8 0044
02B8 0050
-
02B8 0060
02B8 0064 - 02B9 FFFF
-
-
-
-
-
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Product Folder Link(s)
:TMS320C6474
ACRONYM
REGISTER NAME
VCPIC0
VCP2 input configuration Register 0
VCPIC1
VCP2 input configuration Register 1
VCPIC2
VCP2 input configuration Register 2
VCPIC3
VCP2 input configuration Register 3
VCPIC4
VCP2 input configuration Register 4
VCPIC5
VCP2 Input Configuration Register 5
-
Reserved
VCPOUT0
VCP2 output Register 0
VCPOUT1
VCP2 output Register 1
-
Reserved
VCPWBM
VCP2 branch metrics write FIFO
Register
-
Reserved
VCPRDECS
VCP2 decisions read FIFO Register
VCPEXE
VCP2 execution Register
VCPEND
VCP2 Endian mode Register
VCPSTAT0
VCP2 Status Register 0
VCPSTAT1
VCP2 Status Register 1
VCPERR
VCP2 error Register
-
Reserved
VCPEMU
VCP2 emulation control Register
-
Reserved
BM
Branch metrics
SM
State metric
TBHD
Traceback hard decision
TBSD
Traceback soft decision
IO
Decoded bits
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