Device Overview; Device Characteristics - Texas Instruments TMS320C6745 Manual

TMS320C6745, TMS320C6747
SPRS377F – SEPTEMBER 2008 – REVISED JUNE 2014

3 Device Overview

3.1

Device Characteristics

Table 3-1 provides an overview of the C6745/6747 low power digital signal processor. The table shows
significant features of the device, including the capacity of on-chip RAM, peripherals, and the package
type with pin count.
HARDWARE FEATURES
EMIFB
EMIFA
Flash Card Interface
EDMA3
Timers
UART
SPI
2
I C
Multichannel Audio
Serial Port [McASP]
Peripherals
10/100 Ethernet MAC
with Management Data
Not all peripherals pins
I/O
are available at the
eHRPWM
same time (for more
detail, see the Device
eCAP
Configurations section).
eQEP
UHPI
USB 2.0 (USB0)
USB 1.1 (USB1)
General-Purpose
Input/Output Port
LCD Controller
RTC
PRU Subsystem
(PRUSS)
Size (Bytes)
On-Chip Memory
Organization
C674x CPU ID + CPU Control Status Register
Rev ID (CSR.[31:16])
C674x Megamodule Revision ID Register
Revision (MM_REVID[15:0])
8 Device Overview
Table 3-1. Characteristics of the C6745/C6747 Processor
16bit, up to 128MB SDRAM
Asynchronous (8-bit bus width) RAM,
Flash, NOR, NAND
32 independent channels, 8 QDMA channels, 2 Transfer controllers
2 64-Bit General Purpose (each configurable as 2 separate 32-bit timers, 1 configurable
2 (each with transmit/receive, FIFO buffer,
6 Single Edge, 6 Dual Edge Symmetric, or 3 Dual Edge Asymmetric Outputs
Full Speed Host Or Device with On-Chip
DSP Memories can be made accessible to EDMA3, and other peripherals.
Submit Documentation Feedback
Product Folder Links:
C6745
MMC and SD cards supported.
as Watch Dog)
3 (one with RTS and CTS flow control)
2 (each with one hardware chip select)
2 (both Master/Slave)
16/9 serializers)
1 (RMII Interface)
3 32-bit capture inputs or 3 32-bit auxiliary PWM outputs
2 32-bit QEP channels with 4 inputs/channel
-
PHY
-
8 banks of 16-bit
-
-
2 Programmable PRU Cores
320 KB RAM
DSP
32KB L1 Program (L1P)/Cache (up to 32KB)
32KB L1 Data (L1D)/Cache (up to 32KB)
256KB Unified Mapped RAM/Cache (L2)
-
0x1400
0x0000
Copyright © 2008–2014, Texas Instruments Incorporated
TMS320C6745 TMS320C6747
C6747
16/32bit, up to 256MB SDRAM
Asynchronous (8/16-bit bus width) RAM,
Flash, 16bit up to 128MB SDRAM, NOR,
NAND
3 (each with transmit/receive, FIFO buffer,
16/9 serializers)
1 (16-bit multiplexed address/data)
High-Speed OTG Controller with on-chip
OTG PHY
Full-Speed OHCI (as host) with on-chip
PHY
1
1 (32 KHz oscillator and seperate power
trail. Provides time and date tracking and
alarm capability.)
448 KB RAM
ADDITIONAL MEMORY
128KB RAM
www.ti.com