Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1049

Offset Bits Name
0x02 0-12 —
13–15 AAL
0x04 — TxDBPTR
0x08 — TBDCNT
0x0A — TBD_Offset Transmit BD offset. Holds offset from TBD_BASE of the current BD. Initialize to 0.
0x0C 0–7 Rate
Reminder
8–15 PCR Fraction Peak cell rate fraction. Holds the peak cell rate fraction of this channel in units of 1/256
0x0E — PCR
0x10 — —
0x16 — APCLC
0x18 — ATMCH
0x1C 0–1 —
2–7 PMT
8–15 TBD_BASE
0x1E 0–11
12 BNM
13 STPT
14 IMK
15 PM
Freescale Semiconductor
Table 31-7. TCT Field Descriptions (continued)
Reserved, should be cleared during initialization.
AAL type
000 AAL0 —Reassembly with no adaptation layer
001 AAL1 —ATM adaptation layer 1
010 AAL5 —ATM adaptation layer 5.
100 AAL2 —ATM adaptation layer 2. Refer to
101 AAL1_CES —ATM adaptation layer 1 with circuit emulation service
All others reserved.
Tx data buffer pointer. Holds the real address of the current position in the Tx buffer.
Transmit BD count. Counts the remaining data to transmit in the current transmit buffer.
Its initial value is loaded from the data length field of the TxBD when a new buffer is
open; its value is subtracted for any transmitted cell associated with this channel.
Rate remainder. Used by the APC to hold the rate remainder after adding the pace
fraction to the additive channel rate. Initialize to 0.
slot. If this is an ABR channel, this field is automatically updated by the CP.
Peak cell rate. Holds the peak cell rate (in units of APC slots) permitted for this channel
according to the traffic contract. Note that for an ABR channel, the CP automatically
updates PCR to the ACR value.
Protocol-specific
APC linked channel. Used by the CP. Initialize to 0 (null pointer).
ATM cell header. Holds the full (4-byte) ATM cell header of the current channel. The
transmitter appends ATMCH to the cell payload during transmission.
Reserved, should be cleared during initialization.
Performance monitoring table. Points to one of the available 64 performance monitoring
tables. The starting address of the table is PMT_BASE+PMT × 32. Can be changed
on-the-fly.
TxBD base. Points to the first BD in the channel's TxBD table. The 8 most-significant
bits of the address are taken from BD_BASE_EXT in the parameter RAM. The four
least-significant bits of the address are taken as zero.
Buffer-not-ready interrupt mask. Can be changed on-the-fly.
0 The transmit buffer-not-ready event of this channel is masked. (TBNR event is not
sent to the interrupt queue.)
1 The buffer-not-ready event of this channel is enabled.
Stop transmit. Initialize to 0. When the host sets this bit, the CP deactivates this channel
and clears TCT[VCON] when the channel is next encountered in the APC scheduling
table. Note that for AAL5 if STPT is set and frame transmission is already started
(TCT[INF]=1), an abort indication will be sent (last cell with zero length field).
Interrupt mask. Can be changed on-the-fly.
0 The transmit buffer event of this channel is masked. (TXB event is not sent to the
interrupt queue.)
1 The transmit buffer event of this channel is enabled.
Performance monitoring. Can be changed on-the-fly.
0 No performance monitoring for this VC.
1 Performance is monitored for this VC. When a cell is sent for this VC, the performance
monitoring table indicated in PMT field is updated.
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
ATM AAL1 Circuit Emulation Service
Description
Chapter 32, "ATM AAL2."
31-33