Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1315

33.4.7.1, 33- 47
0
OFFSET + 0 V —
OFFSET + 2 L/G
9 DSL DCB synchronization lost. This interrupt is issued when a link in a group with IGRSTATE[GDSS] = 11
loses synchronization, and the link enters HUNT state at the IFSM.
33.4.10, 33-54
33.4.10 Changing IMA Version
A new CPCR command has been added to the IMA microcode to change the IMA version
on-the-fly without software intervention. Use the following procedure:
1. Before issuing the command, the user should initialize the COMM_INFO fields in the
parameter RAM as described in
2. To issue this FCC command, refer to Section 20.4, "Command Set." Use opcode 1101 (0xD).
0
0x86
0x88
0x8A
m
Offset Bits
0x86 0–8
9–11 ITG
12–15 —
0x88 0–15 Filler CRC Filler cell CRC. Set to 0xC602 (for IMA version 1.0) or 0xD902 (for IMA version 1.1)
0x8A 0–13 —
14–15 IV
3. Wait for the CPCR[FLG] to be cleared by the CPM before issuing a new CP command. Refer
to Section 20.4, "Command Set."
Freescale Semiconductor
Add DSL to Offset + 0 in Figure 33-29 and Table 33-23, as shown in the
following:
1 2 3 5
W —
Add the following new section:
Figure Table
—
Table 33-13. COMM_INFO Field
Name
— Reserved, should be cleared.
IMA transmit group. Program to the IMA group number [0–7] multiplied by 16 bytes.
For example, if the IMA group number = 3, program ITG to 0x30.
Reserved, should be cleared.
Reserved, should be cleared.
IMA version
00 Reserved
01 IMA version 1.0
10 Reserved
11 IMA version 1.1
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
6 7 8 9 10
TQU TQO — DSL LS
NUM
33-13..
8 9
ITG
Filler CRC
—
Description
Reference Manual (Rev 1) Errata
11 12 13 14
DCBO LDS GDS IFSD IFSW
11 12
—
IV
15
15
B-13