Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1296

Parallel I/O Ports
Table 40-8. Port D Dedicated Pin Assignment (PPARD = 1) (continued)
Pin
PDIRD = 1 (Output)
PD21 SCC4: TXD
PD20 SCC4: RTS
SCC4: TENA
Ethernet
PD19 FCC1: TxAddr[4]
2
MPHY, master,
multiplexed polling
FCC2: TxAddr[3]
MPHY, master,
multiplexed polling
PD18 FCC1: RxAddr[4]
MPHY, master,
multiplexed polling
FCC2: RxAddr[3]
MPHY, master,
multiplexed polling
PD17 BRG2: BRGO
PD16 FCC1: TxPrty
UTOPIA
(primary option)
PD15 TDM_C2: L1RQ
PD14 TDM_C2: L1CLKO
PD13 SI1: L1ST1
PD12 SI1: L1ST2
40-18
PSORD = 0
PDIRD = 0 (Input)
1
FCC1: RxD[3]
UTOPIA 16
1
FCC1: RxD[2]
UTOPIA 16
1, 1,3
FCC1: TxAddr[4] 1
MPHY, slave,
multiplexed polling
1,3
FCC1: TxClav3
1
MPHY, master, direct
polling
1
FCC2: TxAddr[0]
MPHY, slave,
multiplexed polling
1,2 1,3
FCC1: RxAddr[4]
MPHY, slave,
multiplexed polling
1 1,3
FCC1: RxClav3
MPHY, master, direct
polling
1
FCC2: RxAddr[0]
MPHY, slave,
multiplexed polling
FCC1: RxPrty
UTOPIA
5
(primary option)
1
TDM_C1:
4
L1TSYNC/GRANT
5
(secondary option)
1
FCC1: RxD[1]
UTOPIA 16
1
FCC1: RxD[0]
UTOPIA 16
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Pin Function
Defaul
PDIRD = 1 (Output)
t Input
GND
GND
GND BRG1: BRGO
GND
GND
GND
GND
GND
PSORD = 1
PDIRD = 0 (Input, or Defaul
Inout if Specified) t Input
4
TDM_A2: L1RXD GND
Inout, serial
TDM_A2:
4
L1RXD[0]
Input, nibble
(secondary option)
TDM_A2: GND
4
L1RSYNC
(secondary option)
SPI: SPISEL V
5
(primary option)
SPI: SPICLK GND
Inout
5
(primary option)
SPI: SPIMOSI V
Inout
SPI: SPIMISO SPIMO
Inout
I2C: I2CSDA V
Inout
I2C: I2CSCL GND
Inout
TDM_B1: L1TXD GND
Inout
TDM_B1: L1RXD GND
Inout
Freescale Semiconductor
DD
DD
SI
DD