Aal2 Switching; Cid Mapping Process - Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual

ATM AAL2
• RxQD offsets from 8 through 511 point into the internal RxQD table located in dual-port RAM at
RxQD_Base_Int. Note that the first 32 bytes of the internal RxQD table are reserved (so offsets
0–7 are reserved).
• RxQD offsets greater than 511 point into the external RxQD table located at RxQD_Base_Ext +
(512*4).
• Because the three types of RxQDs are different sizes, some offset numbers may not be used.
CID mapping table base
CID mapping table
CID0
RxQD offset
CID1
RxQD offset
•
•
•
CID255
RxQD offset
RxQD offset
Half-word
RxQD_Base_Ext + 512*4
(in FCC parameter RAM)
32.4.3

AAL2 Switching

Switching is performed by pointing an RX CID at a switch RxQD (see
is unique for each Rx CID. The descriptor holds a translation CID number and a pointer to a CPS TxQD
into which this packet is saved and later sent by the transmitter. (The TxQD pointer is responsible for the
actual PHY | VP | VC switching.) The TxQD pointed to by the switch RxQD(s) should have TxQD[SW]
set and should not be modified by the host when the channel is active. The transmit scheduling of the
packet is done by the APC according to the programmed bit rate of the ATM channel that holds the
switched queue.
32-22
Header STF CID-PH CPS packet payload
AAL2 RCT
RxQD_Base_Int +
RxQD_Offset*4
Figure 32-13. CID Mapping Process
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
ATM cell
CID-PH CPS packet payload
RxQD_Base_Int
(in FCC parameter RAM)
RxQD table (internal)
0
Reserved
32
SSSAR RxQD
64
CPS RxQD
72
Switch RxQD
2044
RxQD table (external)
2048
CPS RxQD
Switch RxQD
RxBD table Rx buffers
RxBD table Rx buffers
Tx queue descriptor
Tx buffers
TxBD table
Figure 32-14). The switch RxQD
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