Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1300

Register Quick Reference Guide
Description
Machine state register
Table A-4 lists supervisor-level SPRs defined by the PowerPC architecture.
SPR Number
Decimal SPR[5–9]
18 00000
19 00000
22 00000
26 00000
27 00000
272 01000
273 01000
274 01000
275 01000
284 01000
285 01000
287 01000
1
Any read (mftb) to this address causes an implementation-dependent software emulation exception.
A-2
Table A-3. Supervisor-Level PowerPC Registers
Name
MSR See the Programming Environments Manual and
MPC603e RISC Microprocessor User's Manual
Table A-4. Supervisor-Level PowerPC SPRs
Name
SPR[0–4]
10010 DSISR See the Programming Environments
Manual
10011 DAR See the Programming Environments
Manual
10110 DEC See the Programming Environments
Manual
11010 SRR0 See the Programming Environments
Manual
See the Programming Environments
11011 SRR1
Manual
10000 SPRG0 See the Programming Environments
Manual
10001 SPRG1
10010 SPRG2
10011 SPRG3
1
11100 TBL write See the Programming Environments
Manual
1
11101 TBU write
11111 PVR Section 2.3.1.2.4, "Processor Version
Register
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Comments
Comments
(PVR)."
Serialize Access
Write fetch sync
Serialize Access
Write: Full sync
Read: Sync relative to
load/store operations
Write: Full sync
Read: Sync relative to load/
store operations
Write
Write
Write
Write
Write (as a store)
No (read-only register)
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