Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1040

ATM AAL1 Circuit Emulation Service
Offset Name
0x82 VCI_Filtering
0x84 GMODE
0x86 COMM_INFO
0x88
0x8A
0x8C Reserved
0x90 CRC32_PRES
0x94 CRC32_MASK
0x98 AAL1_SNPT_BASE
0x9A —
0x9C SRTS_BASE
0xA0 IDLE/UNASSIGN_BASE Hword Idle/unassign cell base address. Points to dual-port RAM area contains
0xA2 IDLE/UNASSIGN_SIZE
0xA4 EPAYLOAD
0xA8 Trm
0xAC Nrm
0xAE Mrm
0xB0 TCR
0xB2 ABR_RX_TCTE
31-24
Table 31-3. AAL1 CES Field Descriptions (continued)
Width
Hword VCI filtering enable bits. When cells with VCI = 3, 4, 6, 7-15 are received
and the associated VCI_Filtering bit = 1 the cell is sent to the raw cell
queue. VCI=3 is associated with VCI_Filtering[3], VCI=15 is associated
with VCI_Filtering[15]. VCI_Filtering[0–2, 5] should be zero. See
Section 30.10.1.2, "VCI Filtering
Hword Global mode. User-defined. See
(GMODE)."
Hword The information field associated with the last host command.
User-defined. See
Hword
Hword
Word Reserved, should be cleared during initialization.
Word Preset for CRC32. Initialize to 0xFFFFFFFF.
Word Constant mask for CRC32. Initialize to 0xDEBB20E3.
Hword AAL1 SNP protection look up table base address. (AAL1 and AAL1 CES
only.) The 32-byte table resides in dual-port RAM and must be initialized
by the user (See
Protection
Hword Reserved, should be cleared during initialization.
Word External SRTS logic base address. (AAL1and AAL1 CES only.) Should
be 16-byte aligned.
idle/unassign cell template (little-endian format). Should be 64-byte
aligned. User-defined. The ATM header should be 0x0000_0000 or
0x0100_0000 (CLP=1).
Hword Idle/Unassign cell size. 52 in regular mode. 53–64 in UDC mode.
Word Reserved payload. Initialize to 0x6A6A6A6A.
Word (ABR only) The upper bound on the time between F-RM cells for an active
source. TM 4.0 defines the Trm period as 100 msec. The Trm value is
defined by the system clock and the time stamp timer prescaler (See
RTSCR). For time stamp prescalar of 1µS, Trm should be set to 100
ms/1µs = 100,000.
Hword (ABR only) Controls the maximum cells the source may send for each
F-RM cell. Set to 32 cells.
Hword (ABR only) Controls the bandwidth between F-RM, B-RM and user data
cell. Set to 2 cells.
Hword (ABR only) Tag cell rate. The minimum cell rate allowed for all ABR
channels. An ABR channel whose ACR is less then TCR sends only
out-of-rate F-RM cells at TCR. Should be set to 10 cells/sec as defined in
the TM 4.0. Uses the ATMF TM 4.0 floating-point format. Note that the
APC minimum cell rate should be at least TCR.
Hword (ABR only) Points to total of 16 bytes reserved dual-port RAM area used
by the CP. Should be 16 byte aligned. User-defined.
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Description
(VCIF)."
Section 30.10.1.3, "Global Mode Entry
Section 30.14, "ATM Transmit
Section 31.14, "AAL1 Sequence Number (SN)
Table.").
Command."
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