Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual page 1205

1
Offset Name
0x68 TFCSTAT
0x6A TFCLEN
0x6C TFCPTR
0x70 MFLR
0x72 PADDR1_H Hword The 48-bit individual address of this station. PADDR1_L is the lowest order half-word,
0x74 PADDR1_
M
0x76 PADDR1_L Hword
0x78 IBD_CNT
0x7A IBD_STAR
T
0x7C IBD_END
0x7E TX_LEN
0x80 IBD_BASE
0xA0 IADDR_H
0xA4 IADDR_L
0xA8 MINFLR
0xAA TADDR_H
0xAC TADDR_M Hword
0xAE TADDR_L
0xB0 PAD_PTR
0xB2 —
Freescale Semiconductor
Table 35-2. Ethernet-Specific Parameter RAM (continued)
Width
Hword Out-of-sequence TxBD. Includes the status/control, data length, and buffer pointer
fields in the same format as a regular TxBD. Useful for sending flow control frames.
Hword
This area's TxBD[R] is always checked between frames, regardless of FPSMR x [FCE].
If it is not ready, a regular frame is sent. The user must set TxBD[L] when preparing
Word
this BD. If TxBD[I] is set, a TXC event is generated after frame transmission. This area
should be cleared when not in use.
Hword Maximum frame length register (typically1518 decimal). If the Ethernet controller
detects an incoming frame exceeding MFLR, it sets RxBD[LG] (frame too long) in the
last RxBD, but does not discard the rest of the frame. The controller also reports the
frame status and length of the received frame in the last RxBD. MFLR includes all
in-frame bytes between the start frame delimiter and the end of the frame.
and PADDR1_H is the highest order half-word.
Hword
Hword Internal BD counter
Hword Internal BD start pointer
Hword Internal BD end pointer
Hword Tx frame length counter
32 Internal microcode usage
Bytes
Word Individual address filter high/low. Used in the hash table function of the individual
addressing mode. The user can write zeros to these values after reset and before the
Word
Ethernet channel is enabled to disable all individual hash address recognition
functions. Issuing a
Section 35.13, "Hash Table
Hword Minimum frame length register (typically 64 decimal). If the Ethernet receiver detects
an incoming frame shorter than MINFLR, it discards that frame unless FPSMR[RSH]
(receive short frames) is set, in which case RxBD[SH] (frame too short) is set in the
last RxBD. The Ethernet transmitter pads frames that are too short (according to
TxBD[PAD] and the PAD value in the parameter RAM). PADs are added to make the
transmit frame MINFLR bytes.
Hword Allows addition of addresses to the individual and group hashing tables. After an
address is placed in TADDR, issue a
lowest-order half-word; TADDR_H is the highest.
A zero in the I/G bit indicates an individual address; 1 indicates a group address.
Hword
Hword Internal PAD pointer. This internal 32-byte aligned pointer points to a 32-byte buffer
filled with pad characters. The pads may be any value, but all the bytes should be the
same to assure padding with a specific character. If a specific padding character is not
needed, PAD_PTR should equal the internal temporary data pointer TIPTR; see
Section 29.7, "FCC Parameter
Hword Reserved, should be cleared.
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Description
command enables the hash table. See
SET GROUP ADDRESS
Algorithm."
SET GROUP ADDRESS
RAM."
Fast Ethernet Controller
command. TADDR_L is the
35-9