Sssar Tx Queue Descriptor; Cps Packet Header Format - Freescale Semiconductor MPC8260 PowerQUICC II Family Reference Manual

0
Channel identifier (CID)
32.3.5.4

SSSAR Tx Queue Descriptor

A SSSAR TxBD table and its associated buffers are collectively called an SSSAR TX Queue. Each
SSSAR TX Queue is managed by an SSSAR TxQD, as shown in
base address of the BD table, the offset of the next BD to be serviced, the data buffer pointer, and other
queue-specific parameters. The NextQueue pointer is used to create a linked list of TxQDs, as described
in Section 32.3.2, "Transmit Priority Mechanism."
a 32-byte aligned address.
0
Offset + 0x00
Offset + 0x02
Offset + 0x04
Offset + 0x06
Offset + 0x08
Offset + 0x0A
Offset + 0x0C
Offset + 0x0E
Offset + 0x10
Offset + 0x12
Offset + 0x14
Offset + 0x16
Offset + 0x18
Offset + 0x1a
Offset + 0x1C
Offset + 0x1E
Table 32-4 describes the SSSAR TxQD fields.
Freescale Semiconductor
7 8
Length indicator (LI)
Figure 32-10. CPS Packet Header Format
—
Seg_Len
TxBD Table Offset Out
Figure 32-11. SSSAR Tx Queue Descriptor
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
13 14
User-to-user ID (UUI)
Figure 32-11. The TxQD contains the
The SSSAR TxQD is located in the dual-port RAM in
7 8 9 10
BNM UUI INF
TxBD Table Base
—
NextQueue
—
18 19
Header error check (HEC)
11 12 13 14
CPS TBM SSSAR —
—
ATM AAL2
23
15
32-17