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iC9200 Series
5.12
Response times
5.12.1
There is no error
Maximum expected
response time in the case
without errors
HB700 | CPU | PMC921xEx | en | 24-04
NOTICE
If your CPU is still in the Hard fail safe state after a power cycle and this
does not change even after a reset
tings'...page
127, please contact the Yaskawa hotline.
Without an error, it is assumed that none of the watchdogs respond and the passage of
a signal from the input connector of a safety input module to the output connector of a
safety output module is considered:
T
= TI
+ TI
+ TI
WCDT
maxNF
ST
⮫ 'Designations'...page 135
T
Max. response time without errors (max No Fault).
maxNF
TI
Input smoothing time of the inputs of the safety SDI (Smoothing Time).
ST
TI/TO
Max. response time without errors (Worst Case Delay Time).
WCDT
TI
Max. Response time of the decentralised periphery system, i.e. delay caused
Slave
by the FSoE EtherCAT coupler and the backplane bus.
TI
EtherCAT cycle time for EtherCAT bus communication. The EtherCAT cycle
BUS
time results from the cycle times of all connected EtherCAT slaves.
T
Cycle time of the safety CPU.
CL
T
Cycle time safety program.
FPROG
For plant design sensor and actuator run times are to be taken into account:
T
= T
+ T
maxNFSA
SensorDLY
⮫ 'Designations'...page 135
T
Max. response time without errors with sensor and actuator
maxNFSA
(max No Fault Sensor Actuator).
T
Delay time of the sensor (Sensor DeLaY).
SensorDLY
T
Max. response time without errors (max No Fault).
maxNF
T
Delay time of the actuator (Actuator DeLaY).
ActuatorDLY
⮫ 'MRESET and reset to factory set-
+ TI
+ T
+ T
Slave
BUS
CL
FPROG
+ T
maxNF
ActuatorDLY
Deployment CPU iC921xM-FSoE
Response times > There is no error
+ TO
+ TO
+ TO
BUS
Slave
WCDT
131
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