Software Interrupt Set Register (Bits 8-15); Interrupt Clear Register (Bits 24-31) - Motorola MVME162FX Programmer's Reference Manual

Embedded controller
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VMEchip2

Software Interrupt Set Register (bits 8-15)

2
ADR/SIZ
BIT
NAME
OPER
RESET

Interrupt Clear Register (bits 24-31)

ADR/SIZ
BIT
NAME
OPER
RESET
2-88
15
14
13
SSW7
SSW6
SSW5
S
S
0 PSL
0 PSL
0 PSL
This register is used to set the software interrupts. An interrupt is
set by writing a one to it. The software interrupt set bits are:
SSW0
Set software 0 interrupt
SSW1
Set software 1 interrupt
SSW2
Set software 2 interrupt
SSW3
Set software 3 interrupt
SSW4
Set software 4 interrupt
SSW5
Set software 5 interrupt
SSW6
Set software 6 interrupt
SSW7
Set software 7 interrupt
31
30
29
CACF
CAB
CSYSF CMWP
C
C
C
0 PSL
0 PSL
0 PSL
This register is used to clear the edge-sensitive interrupts. An
interrupt is cleared by writing a one to its clear bit. The clear bits are
defined below.
Clear tick timer 1 interrupt
CTIC1
$FFF40070 (8 bits of 32)
12
11
SSW4
SSW3
S
S
S
0 PSL
0 PSL
$FFF40074 (8 bits of 32)
28
27
CPE
C
C
0 PSL
0 PSL
10
9
8
SSW2
SSW1
SSW0
S
S
S
0 PSL
0 PSL
0 PSL
26
25
24
CVI1E
CTIC2
CTIC1
C
C
C
0 PSL
0 PSL
0 PSL

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