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Prescaler Control Register
ADR/SIZ
BIT
7
NAME
OPER
RESET
The prescaler provides the various clocks required by the counters
and timers in the VMEchip2. In order to specify absolute times from
these counters and timers, the prescaler must be adjusted for
different local bus clocks. The prescaler register should be
programmed based on the following equation. This provides a one
MHz clock to the Tick timers.
For example, for operation at 25 MHz the prescaler value is $E7,
and at 32 MHz it is $E0.
Non-integer local bus clocks introduce an error into the specified
times for the various counters and timers. This is most notable in
the tick timers. The tick timer clock can be derived by the following
equation.
If the prescaler is not correctly programmed, the bus timers do not
generate their specified values and the VMEbus reset time may be
violated. The maximum clock frequency for the tick timers is the B
clock divided by two. The prescaler register control logic does not
allow the value 255 ($FF) to be programmed.
$FFF4004C (8 bits of 32)
Prescaler Adjust
prescaler register = 256 - B clock (MHz)
tick timer clock = B clock / (256 - prescaler value)
LCSR Programming Model
. . .
R/W
$DF P
2
0
2-69
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