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MVME162FX Version Register, MC2 chip
MVME712X
1-2
MVME712x
5-1
N
negation, definition
iv
no address increment DMA transfers
non-privileged access cycles
NVRAM memory map
1-31
O
overflow counter
2-76
MC2 chip
3-20
VMEchip2
2-75
overview
MC2 chip
3-2
MVME162FX
1-1
P
pacer clock
programming
4-44
Pacer Clock General Control Register, IP2
chip
4-45
Pacer Clock Interrupt Control Register, IP2
chip
4-44
Pacer Clock Timer Register, IP2 chip
PAL contents
3-36, 3-37
parity
checking
3-6
checking mode
3-47
control and interrupt logic
error interrupts
3-23
percent, definition
iv
periodic interrupt example
power monitor
2-18
powerup reset
MC2 chip
3-44
VMEchip2
2-73
Prescaler Clock Adjust Register
Prescaler Control Register
Prescaler Count Register, MC2 chip
Prescaler Counter
2-76
prescaler, VMEchip2
2-15
priority
interrupt
1-38, 3-14
Priority (PRI) mode
2-18
3-37
2-13
2-37, 2-39
4-46
3-23
A-1
3-18
2-69
3-50
processor clock
3-18
program access cycles
2-36, 2-38
program address modifier code
programmable map decoders
programming
DMA controller, VMEchip2
GCSR, VMEchip2
2-105
LCSR, VMEchip2
2-22
local bus interrupter, VMEchip2
local bus to VMEbus map decoders,
VMEchip2
2-39
tick and watchdog timers, VMEchip2
tick timers, MC2 chip
VMEbus slave map decoders,
VMEchip2
2-28
programming model
IP2 chip
4-10
MC2 chip
3-11
VMEchip2 GCSR
2-103
VMEchip2 LCSR
2-22
programming the DMA controllers
programming the pacer clock
PROM Decoder, SRAM and DMA Control
Register
2-54
PWB number
1-35
R
redundant functions, VMEchip2/MC2 chip
refresh rate
3-40
register definitions, LCSR
register map, MC2 chip
registers
local bus map decoders
VMEbus slave map decoder
release-on-acknowledge (ROAK) mode
release-on-request (ROR) mode
release-when-done (RWD) mode
reset drivers
2-19
reset status
IP2 chip
4-10
MC2 chip
3-11
RESET switch
enable/disable
2-73
RESET Switch Control Register, MC2 chip
Revision Register
MC2 chip
3-12
Index
2-50
2-6, 2-39
2-52
2-77
2-66
3-16
4-31
4-44
1-6
2-22
3-10
2-40
2-28
2-17
2-9
2-9
3-44
IN-7
I
N
D
E
X
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