Table 3-6. Sram Size Control Bit Encoding - Motorola MVME162FX Programmer's Reference Manual

MC2 Chip
3
3-30
SZx bits indicate the size of the SRAM array.
SZ1-SZ0
Software must initialize the SRAM Space Size
Register ($FFF42024 bits 9 - 8) based on the value of
SZ1-SZ0. SZ1-SZ0 are initialized at reset to a value
which is determine by the contents of a factory-
programmed resident device.
F0 F0 is a status bit indicating the Flash population
option of the MVME162FX. F0 set to a 0 indicates
that one 28F008SA 1M x 8 Flash memory device is
used. F0 set to a 1 indicates that four 28F020 256K x
8 Flash memory devices are used.
F1 F1 bit controls the internal data path of the MC2 chip
ASIC. If it is set to a 0, the Flash data path is eight bits
and passes through the ASIC. If it is set to a 1, the
path is 32 bits and is external to the ASIC.
BEQ1 BEQ1 set to a 0 indicates that the base board
population of the MVME162FX is 4 MB. When it is
set to a 1, the population option is 1 MB. This is a
read-only bit.

Table 3-6. SRAM Size Control Bit Encoding

SZ1 - SZ0
$0
$1
$2
$3
SRAM ConÞguration
Reserved
512KB
1MB
2MB