Local Bus Interrupter Enable Register (Bits 16-23) - Motorola MVME162FX Programmer's Reference Manual

Local Bus Interrupter Enable Register (bits 16-23)

ADR/SIZ
BIT 23
EVIA
NAME
OPER R/W
RESET 0 PSL
This register is the local bus interrupter enable register. When an
enable bit is high, the corresponding interrupt is enabled. When an
enable bit is low, the corresponding interrupt is disabled. The
enable bit does not clear edge-sensitive interrupts or prevent the
flip flop from being set. If necessary, edge-sensitive interrupters
should be cleared to remove any old interrupts and then enabled.
ELM0
ELM1
ESIG0
ESIG1
ESIG2
ESIG3
EDMA
EVIA
$FFF4006C (8 bits of 32)
22 21 20
EDMA ESIG3 ESIG2
R/W R/W R/W
0 PSL 0 PSL 0 PSL
Enable GCSR LM0 interrupt
Enable GCSR LM1 interrupt
Enable GCSR SIG0 interrupt
Enable GCSR SIG1 interrupt
Enable GCSR SIG2 interrupt
Enable GCSR SIG3 interrupt
Enable DMAC interrupt
VMEbus interrupter acknowledge interrupt
LCSR Programming Model
19 18 17
ESIG1 ESIG0 ELM1
R/W R/W R/W
0 PSL 0 PSL 0 PSL
2
16
ELM0
R/W
0 PSL
2-85