Lanc Error Status Register - Motorola MVME162FX Programmer's Reference Manual

MC2 Chip

LANC Error Status Register

ADR/SIZ
3
BIT
NAME
OPER
RESET
3-32
31 30 29
R R R
0 0
SCLR Writing a 1 to this bit clears bits LTO,EXT, and
PRTY. Reading this bit always yields 0.
LTO,EXT, These bits indicate the status of the last local bus
PRTY error condition encountered by the LANC while
performing DMA accesses to the local bus. A local
bus error condition is flagged by the assertion of
TEA*. When the LANC receives TEA* if the source
of the error is local time-out, then LTO is set and EXT
and PRTY are cleared. If the source of the TEA* is
due to an error in going to the VMEbus, then EXT is
set and the other two status bits are cleared. If the
source of the error is DRAM parity check error, then
PRTY is set and the other two status bits are cleared.
If the source of the error is none of the above
conditions, then all three bits are cleared. Writing a
1 to bit 24 (SCLR) also clears all three bits.
$FFF42028 (8 bits)
28 27
PRTY
R R
0 0 0 PL
26 25 24
EXT LTO SCLR
R R C
0 PL 0 PL 0 PL