Introduction; Summary Of Major Features - Motorola MVME162FX Programmer's Reference Manual

Introduction

The Memory Controller ASIC (MC2 chip) is one of three ASICs that
are part of the MVME162FX hardware set. The MC2 chip is
designed to operate synchronously with the MC68040 local bus
clock at 25MHz or 32MHz.

Summary of Major Features

BBRAM and time-of-day clock (MK48T08) interface with bus
sizing.
EPROM interface with bus sizing.
Flash interface with bus sizing.
SRAM controller supporting several configurations.
DRAM controller supporting several configurations.
Four Zilog Z85230 SCC interface.
NCR 53C710 SCSI Coprocessor interface.
Intel 82596CA LAN Coprocessor interface.
Four 32-bit tick timers.
Interrupt support for
and Timers.
Local bus access timer.
Watchdog timer.
3MC2 Chip
switch, LAN, SCSI, SCC, DRAM,
ABORT
3
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