Interrupt Level Register 3 (Bits 0-7); Interrupt Level Register 4 (Bits 24-31) - Motorola MVME162FX Programmer's Reference Manual

VMEchip2

Interrupt Level Register 3 (bits 0-7)

2
ADR/SIZ
BIT
NAME
OPER
RESET

Interrupt Level Register 4 (bits 24-31)

ADR/SIZ
BIT
NAME
OPER
RESET
2-96
$FFF40080 (8 bits [6 used] of 32)
7 6
SW1 LEVEL
R/W
0 PSL
This register is used to define the level of the software 0 interrupt
and the software 1 interrupt.
SW0 LEVEL These bits define the level of the software 0
interrupt.
SW1 LEVEL These bits define the level of the software 1
interrupt.
$FFF40084 (8 bits [6 used] of 32)
31 30 29
SPARE LEVEL
R/W
0 PSL
This register is used to define the level of the VMEbus IRQ7
interrupt and the spare interrupt. The VMEbus level 7 (IRQ7)
interrupt may be mapped to any local bus interrupt level.
VIRQ7 LEVEL These bits define the level of the VMEbus IRQ7
interrupt.
SPARE LEVEL Not used on the MVME162FX
5 4 3
28 27
2 1 0
SW0 LEVEL
R/W
0 PSL
26 25 24
VIRQ7 LEVEL
R/W
0 PSL