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processors is kept in memory that is not cached. The software must
also mark all onboard and off-board I/O areas as cache inhibited
and serialized.
Sources of Local BERR*
A TEA* signal (indicating a bus error) is returned to the local bus
master when a local bus time-out occurs, a DRAM parity error
occurs and parity checking is enabled, or a VME bus error occurs
during a VMEbus access.
Note
The devices on the MVME162FX that are able to assert a local bus
error are described below.
Local Bus Time-out
A Local Bus Time-out occurs whenever a local bus cycle does not
complete within the programmed time (VMEbus bound cycles are
not timed by the local bus timer). If the system is configured
properly, this should only happen if software accesses a
nonexistent location within the onboard address range.
VMEbus Access Time-out
A VMEbus Access Time-out occurs whenever a VMEbus bound
transfer does not receive a VMEbus bus grant within the
programmed time. This is usually caused by another bus master
holding the bus for an excessive period of time.
VMEbus BERR*
A VMEbus BERR* occurs when the BERR* signal line is asserted on
the VMEbus while a local bus master is accessing the VMEbus.
VMEbus BERR* should occur only if: an initialization routine
samples to see if a device is present on the VMEbus and it is not,
The present MVME162FX models do not contain parity
DRAM.
Software Support Considerations
1
1-39
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