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344 Glossary
Control Processor
DSP
EU
EU Conversion
FIFO
Flash or Flash Memory Non-volatile semiconductor memory used by the
Scan List
SCP
Swapping
"activated" by an update. This is only for
algorithms that are enabled for swapping. This is
also "double buffering".
The Digital Signal Processor (DSP) chip that
performs all of the HP E1415's internal hardware
control functions as well as performing the EU
Conversion process.
Same as Control Processor
Engineering Units
Engineering Unit Conversion: Converting binary
A/D readings (in units of A/D counts) into
engineering units of voltage, resistance,
temperature, strain. These are the "built in"
conversions (see SENS:FUNC: ...). The
HP E1415 also provides access to custom EU
conversions (see SENS:FUNC:CUST in
command reference and "Creating and Loading
Custom EU Tables" in Chapter 3).
The First-In-First-OUT buffer that provides
output buffering for data sent from an algorithm
to an application program.
HP E1415 to store its control firmware and
calibration constants
A list of up to 64 channels that is built by the
HP E1415. Channels referenced in algorithms are
placed in the Scan List as the algorithm is defined.
This list will be scanned each time the module is
triggered.
Signal Conditioning Plug-on: Small circuit
boards that plug onto the HP E1415's main circuit
board. Available analog input SCPs can provide
noise canceling filters, signal amplifiers, signal
attenuators, and strain bridge completion. Analog
output SCPs are available to provide
measurement excitation current, controlling
voltage, and controlling current. Digital SCPs are
available to both read and write digital states, read
frequency and counts, and output modulated
pulse signals (FM and PWM).
This term applies to algorithms that are enabled to
swap. These algorithms can be exchanged with
Appendix C
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