Figure 13-40: Transfer Request Clear And Register Access Contention - NEC V850E/CA2 JUPITER Preliminary User's Manual

32-/16-bit romless microcontroller
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(d) Cautions
To continue repeat transfers, it is necessary to either read the SIRBn register or write to the
SOTBn register during the transfer reservation period.
If access is performed to the SIRBn register or the SOTBn register when the transfer reservation
period is over, the following occurs.
- In case of contention between transfer request clear and register access
Since request cancellation has higher priority, the next transfer request is ignored. Therefore,
transfer is interrupted, and normal data transfer cannot be performed.

Figure 13-40: Transfer Request Clear and Register Access Contention

SCK0n
(input/output)
INTCSIn
interrupt
rq_clr
Reg_R/W
Remarks: 1. n = 0 to 2
2. rq_clr: Internal signal. Transfer request clear signal.
Reg_WR:Internal signal. This signal indicates that the transmit data buffer register
(SOTBn/SOTBLn) has been written.
420
Chapter 13 Serial Interface Function
Transfer reservation period
Preliminary User's Manual U15839EE1V0UM00

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