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Address
Function Register Name
FFFF F554 Timer D1 Control register
FFFF F560 Watch timer mode register
FFFF F571 Watchdog timer time select register
FFFF F572 Watchdog timer mode register
FFFF F580 Watchdog Timer command register
FFFF F582 Watchdog Timer command status register
FFFF F600 Timer C0 timer counter register
FFFF F602 Timer C0 capture compare register 0
FFFF F604 Timer C0 capture compare register 1
FFFF F606 Timer C0 control register 0
FFFF F608 Timer C0 control register 1
FFFF F609 Timer C0 signal edge select register
FFFF F640
Timer mode register
FFFF F641
FFFF F642
Channel mode register
FFFF F643
FFFF F644
Output control register
FFFF F645
FFFF F646 State register
FFFF F648 Timer Count Register 0
FFFF F64A Timer Count Register 1
FFFF F64C Capture/Compare register 0
FFFF F64E Capture/Compare register 1
FFFF F650 Capture/Compare register 2
FFFF F652 Capture/Compare register 3
FFFF F654 Capture/Compare register 4
FFFF F656 Capture/Compare register 5
FFFF F680
Timer mode register
FFFF F681
FFFF F682
Channel mode register
FFFF F683
FFFF F684
Output control register
FFFF F685
FFFF F686 State register
FFFF F688 Timer Count Register 0
80
Chapter 3 CPU Function
Table 3-6: List of Peripheral I/O Registers (5/7)
Preliminary User's Manual U15839EE1V0UM00
for Manipulation
Symbol
R/W
1-bit 8-bit
×
TMCD1
R/W
×
WTM
R/W
×
WDCS
R/W
×
WDTM
R/W
WCMD
W
×
WPHS
R/W
TMC0
R
CCC00
R/W
CCC01
R/W
×
TMCC00
R/W
×
TMCC01
R/W
×
SESC0
R/W
×
TMGM0
R/W
×
TMGM0L
R/W
×
TMGM0H
R/W
×
TMGCM0
R/W
×
TMGCM0L
R/W
×
TMGCM0H R/W
×
OCTLG0
R/W
×
OCTLG0L
R/W
×
OCTLG0H
R/W
×
TMGST0
R
TMG00
R
TMG01
R
GCC00
R/W
GCC01
R/W
GCC02
R/W
GCC03
R/W
GCC04
R/W
GCC05
R/W
×
TMGM1
R/W
×
TMGM1L
R/W
×
TMGM1H
R/W
×
TMGCM1
R/W
×
TMGCM1L
R/W
×
TMGCM1H R/W
×
OCTLG1
R/W
×
OCTLG1L
R/W
×
OCTLG1H
R/W
×
TMGST1
R
TMG10
R
Bit Units
Initial
Value
16-bit
×
00H
×
00H
×
00H
×
00H
×
undefined
×
00H
×
0000H
×
0000H
×
0000H
×
00H
×
20H
×
00H
×
×
0000H
×
00H
×
00H
×
×
0000H
×
00H
×
00H
×
×
0000H
×
00H
×
00H
×
00H
×
0000H
×
0000H
×
0000H
×
0000H
×
0000H
×
0000H
×
0000H
×
0000H
×
×
0000H
×
00H
×
00H
×
×
0000H
×
00H
×
00H
×
×
0000H
×
00H
×
00H
×
00H
×
0000H
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