On-Page/Off; Figure 5-4: On-Page/Off-Page Judgment During Page Rom Connection (1/2) - NEC V850E/CA2 JUPITER Preliminary User's Manual

32-/16-bit romless microcontroller
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5.2.3 On-page/off-page judgment
Whether a page ROM cycle is on-page or off-page is judged by latching the address of the previous
cycle and comparing it with the address of the current cycle.
Through the page ROM configuration register (PRC), according to the configuration of the connected
page ROM and the number of continuously readable bits, one of the addresses (A3 to A6) is set as the
masking address (no comparison is made).

Figure 5-4: On-Page/Off-Page Judgment during Page ROM Connection (1/2)

(a) In case of 16-Mbit (1 M × 16 bits) page ROM (4-word page access)
Internal address latch
(immediately preceding
address)
V850E/CA2
address output
(b) In case of 16-Mbit (1 M × 16 bits) page ROM (8-word page access)
Internal address latch
(immediately preceding
address)
V850E/CA2
address output
Chapter 5 Memory Access Control Function
a23
a22
a21
a20
A23
A22
A21
A20
Page ROM address
A19
a23
a22
a21
a20
A23
A22
A21
A20
Page ROM address
A19
Preliminary User's Manual U15839EE1V0UM00
a7
a6
a5
MA6
MA5
0
0
Comparison
A7
A6
A5
A6
A5
A4
Off-page address
a7
a6
a5
MA6
MA5
0
0
Comparison
A7
A6
A5
A6
A5
A4
Off-page address
a4
a3
MA4
MA3
PRC register setting
0
0
A0
A4
A3
A2
A1
A3
A2
A1
A0
On-page address
Continuous reading possible:
16-bit data bus width × 4 words
a4
a3
MA4
MA3
PRC register setting
0
1
A0
A4
A3
A2
A1
A1
A0
A3
A2
On-page address
Continuous reading possible:
16-bit data bus width × 8 words
147

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