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6.2.1 Four Kbytes 2-way set-associative Instruction Cache
The data memory of a 4 KBytes 2-way set-associative instruction cache has two ways, each consisting
of a block of 128 entries of 4 words per line, for a total capacity of 4 KB.
Figure 6-2: Configuration of 4 KB 2-Way Set-Associative Instruction Cache
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Chapter 6 Instruction Cache
TAG
15
Tag part
15
15
Comparator
Way selection control signal on hit
IIHIT
Preliminary User's Manual U15839EE1V0UM00
11
10
4
3
2
INDEX
7
2
Data part (4 words)
1 word
1 word
Internal bus
32
Internal bus
Selector
32
Instruction data
1
0
1 word
1 word
32
128
entries
157
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