Programmable Peripheral I/O Registers; Figure 4-3: Programmable Peripheral I/O Register (Outline) - NEC V850E/CA2 JUPITER Preliminary User's Manual

32-/16-bit romless microcontroller
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4.4 Programmable peripheral I/O registers

In the V850E/CA2, the 16 KB area of x0000H to x3FFFH is provided as a programmable peripheral I/O
area. In this area, the area between x0000H and x11FFH is used exclusively for the FCAN controller.
The internal bus of the V850E/CA2 becomes active when the peripheral I/O register area (FFFF000H to
FFFFFFFH) or the programmable peripheral I/O register area (xxxxm000H to xxxxnFFFH) is accessed
(m = xx00B, n = xx11B). Note that when data is written to the peripheral I/O register area, the written
contents is reflected on the peripheral I/O register since peripheral I/O register area is allocated to the
last 4 KB of the programmable peripheral I/O register area.

Figure 4-3: Programmable Peripheral I/O Register (Outline)

3FFFFFFH
3FFF000H
3FFEFFFH
xxxxNFFFH
xxxxM000H
0000000H
Cautions: 1. The programmable peripheral area must not be located above the address
x1FFFFFFH.
2. Once the address of the programmable peripheral area is se, it cannot be
changed.
3. If the programmable peripheral I/O area overlaps the following areas, the pro-
grammable peripheral I/O area becomes ineffective.
Peripheral I/O area
ROM area
RAM area
4. Programmable peripheral I/O area address setting is enabled only once. Do not
change address in the middle of a program.
Remark:
M = xx00B
N = xx11B
Chapter 4 Bus Control Function
Peripheral
I/O register
Programmable
peripheral
I/O register
Preliminary User's Manual U15839EE1V0UM00
Internal local bus
x3FFFH
Peripheral
x3000H
I/O area
x2FFFH
Programmable
x1200H
peripheral
x11FFH
I/O area
x0000H
Dedicated area for
FCAN controller
113

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