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Figure 14-38: CAN 1 to 4 Interrupt Enable Registers (C1IE to C4IE) (3/3)
Write
Bit Position
Bit Name
ST_E_INT6
14, 6
CL_E_INT6
ST_E_INT5
13, 5
CL_E_INT5
ST_E_INT4
12, 4
CL_E_INT4
ST_E_INT3
11, 3
CL_E_INT3
ST_E_INT2
10, 2
CL_E_INT2
ST_E_INT1
9, 1
CL_E_INT1
ST_E_INT0,
CL_E_INT0
8, 0
500
Chapter 14 FCAN Interface Function
Sets/clears the E_INT6 bit.
ST_E_INT6 CL_E_INT6
0
1
1
0
Others
Sets/clears the E_INT5 bit.
ST_E_INT5 CL_E_INT5
0
1
1
0
Others
Sets/clears the E_INT4 bit.
ST_E_INT4 CL_E_INT4
0
1
1
0
Others
Sets/clears the E_INT3 bit.
ST_E_INT3 CL_E_INT3
0
1
1
0
Others
Sets/clears the E_INT2 bit.
ST_E_INT2 CL_E_INT2
0
1
1
0
Others
Sets/clears the E_INT1 bit.
ST_E_INT1 CL_E_INT1
0
1
1
0
Others
Sets/clears the E_INT0 bit.
ST_E_INT0 CL_E_INT0
0
1
1
0
Others
Preliminary User's Manual U15839EE1V0UM00
Function
Status of E_INT6 bit
E_INT6 bit is cleared (0).
E_INT6 bit is set (1).
No change in E_INT6 bit value.
Status of E_INT5 bit
E_INT5 bit is cleared (0).
E_INT5 bit is set (1).
No change in E_INT5 bit value.
Status of E_INT4 bit
E_INT4 bit is cleared (0).
E_INT4 bit is set (1).
No change in E_INT4 bit value.
Status of E_INT3 bit
E_INT3 bit is cleared (0).
E_INT3 bit is set (1).
No change in E_INT3 bit value.
Status of E_INT2 bit
E_INT2 bit is cleared (0).
E_INT2 bit is set (1).
No change in E_INT2 bit value.
Status of E_INT1 bit
E_INT1 bit is cleared (0).
E_INT1 bit is set (1).
No change in E_INT1 bit value.
Status of E_INT0 bit
E_INT0 bit is cleared (0).
E_INT0 bit is set (1).
No change in E_INT0 bit value.
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