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Chapter 17 RESET
17.1 Reset Overview
Jupiter needs a system reset in order to initialize on power-up or re-initialize to escape from power save
mode or system malfunction by Watchdog Timer. Regarding to the Mode setting and source of reset,
different actions are performed on reset.
When a low level is input to the RESET pin, there is a system reset and each hardware item of the
V850E/CA2 is initialized to its initial status.
When the RESET pin changes from low level to high level, reset status is released and the CPU starts
program execution. The user has to initialize the contents of various registers as needed within the pro-
gram.
17.2 Features
•
Noise elimination of RESET pin using analog delay.
17.3 Pin Functions
During a system reset, most pins (all but the RESOUT, V
, V
, CV
, CV
, AV
, AV
pins)
DDn
SSn
DD
SS
DD
REF
enter the high impedance state.
Therefore, when memory is connected externally, a pull-up or pull-down resistor must be connected to
the memory control pins of alphabet ports (PCS, PCT). If no resistors are connected, the memory con-
tents may be lost when these pins enter the high impedance state.
For the same reason, the output pins of the internal peripheral I/O function and other output port should
be handled in the same manner.
Preliminary User's Manual U15839EE1V0UM00
583
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