NEC V850E/CA2 JUPITER Preliminary User's Manual page 176

Figure 7-6: DMA Addressing Control Registers 0 to 3 (DADC0 to DADC3) (2/2)
Bit Position Bit Name
5, 4 DAD1,
DAD0
3, 2 TM1, TM0 Sets the transfer mode during DMA transfer.
Caution: These registers cannot be accessed during DMA operation.
Remark: n = 0 to 3
176
Chapter 7 DMA Functions (DMA Controller)
Sets the count direction of the destination address for DMA channel n (n = 0 to 3).
DAD1 DAD0
0 0
0 1
1 0
1 1
TM1 TM0
0 0
0 1
1 0
1 1
Preliminary User's Manual U15839EE1V0UM00
Function
Count Direction
Increment
Decrement
Fixed
Setting prohibited
Transfer Mode
Single transfer mode
Single-step transfer mode
Line transfer mode
Block transfer mode