Figure 253. Adc Trigger Post-Scaling In Up-Counting Mode; Figure 254. Adc Trigger Post-Scaling In Up/Down Counting Mode - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
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High-resolution timer (HRTIM)
The ADC post-scaler programming register are preloaded and can be updated on-the-fly
without stopping the timers.

Figure 253. ADC trigger post-scaling in up-counting mode

Counter
ADCxPSC[4:0]=0
ADCxPSC[4:0]=1
ADCxPSC[4:0]=2
ADCxPSC[4:0]=3
ADCxPSC[4:0]=4

Figure 254. ADC trigger post-scaling in up/down counting mode

Counter
ADCxPSC[4:0]=0
ADROM[1:0]=00
ADCxPSC[4:0]=1
ADROM[1:0]=01
ADCxPSC[4:0]=1
ADROM[1:0]=10
ADCxPSC[4:0]=3
ADROM[1:0]=00
ADCxPSC[4:0]=4
ADROM[1:0]=01
ADCxPSC[4:0]=4
ADROM[1:0]=10
940/2126
RM0440 Rev 4
RM0440
MSv47427V1
MSv47428V1

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