ST STM32G4 Series Reference Manual page 1372

General-purpose timers (TIM15/TIM16/TIM17)
Table 294. CCR and ARR register change dithering pattern (continued)
-
LSB value
1110
1111
30.4.13 Combined PWM mode (TIM15 only)
Combined PWM mode allows two edge or center-aligned PWM signals to be generated with
programmable delay and phase shift between respective pulses. While the frequency is
determined by the value of the TIMx_ARR register, the duty cycle and delay are determined
by the two TIMx_CCRx registers. The resulting signals, tim_ocxrefc, are made of an OR or
AND logical combination of two reference PWMs:
•
tim_oc1refc (or tim_oc2refc) is controlled by the TIMx_CCR1 and TIMx_CCR2
registers
Combined PWM mode can be selected independently on two channels (one tim_ocx output
per pair of CCR registers) by writing '1100' (Combined PWM mode 1) or '1101' (Combined
PWM mode 2) in the OCxM bits in the TIMx_CCMRx register.
When a given channel is used as a combined PWM channel, its complementary channel
must be configured in the opposite PWM mode (for instance, one in Combined PWM mode
1 and the other in Combined PWM mode 2).
Note: The OCxM[3:0] bit field is split into two parts for compatibility reasons, the most significant
bit is not contiguous with the 3 least significant ones.
Figure 464
mode, obtained with the following configuration:
•
Channel 1 is configured in Combined PWM mode 2,
•
Channel 2 is configured in PWM mode 1,
1372/2126
1 2 3 4
+1 +1 +1 +1
+1 +1 +1 +1
represents an example of signals that can be generated using combined PWM
RM0440 Rev 4
PWM period
5 6 7 8 9
+1 +1 +1 - +1
+1 +1 +1 +1 +1
10 11 12 13 14
+1 +1 +1 +1 +1
+1 +1 +1 +1 +1
RM0440
15 16
+1 -
+1 -